JPH0325949B2 - - Google Patents

Info

Publication number
JPH0325949B2
JPH0325949B2 JP56204543A JP20454381A JPH0325949B2 JP H0325949 B2 JPH0325949 B2 JP H0325949B2 JP 56204543 A JP56204543 A JP 56204543A JP 20454381 A JP20454381 A JP 20454381A JP H0325949 B2 JPH0325949 B2 JP H0325949B2
Authority
JP
Japan
Prior art keywords
layer
channel
region
silicon
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56204543A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57192081A (en
Inventor
Paru Bansaru Jai
Ruisu Baachin Kuraude
Roi Torautoman Ronarudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS57192081A publication Critical patent/JPS57192081A/ja
Publication of JPH0325949B2 publication Critical patent/JPH0325949B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP56204543A 1981-05-19 1981-12-19 Field effect transistor unit Granted JPS57192081A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US26500181A 1981-05-19 1981-05-19

Publications (2)

Publication Number Publication Date
JPS57192081A JPS57192081A (en) 1982-11-26
JPH0325949B2 true JPH0325949B2 (en]) 1991-04-09

Family

ID=23008538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56204543A Granted JPS57192081A (en) 1981-05-19 1981-12-19 Field effect transistor unit

Country Status (3)

Country Link
EP (1) EP0066068B1 (en])
JP (1) JPS57192081A (en])
DE (1) DE3279194D1 (en])

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3321494A1 (de) * 1983-06-14 1984-12-20 Siemens AG, 1000 Berlin und 8000 München Dreidimensionale mos-inverter-anordnung fuer integrierte halbleiterschaltungen und verfahren zu ihrer herstellung
US4488348A (en) * 1983-06-15 1984-12-18 Hewlett-Packard Company Method for making a self-aligned vertically stacked gate MOS device
CA1197628A (en) * 1984-01-05 1985-12-03 Thomas W. Macelwee Fabrication of stacked mos devices
CA1206273A (en) * 1984-09-21 1986-06-17 Iain D. Calder Vertically integrated cmos logic gate
EP0248266A3 (de) * 1986-06-06 1990-04-25 Siemens Aktiengesellschaft Logikschaltung mit einer Mehrzahl von zueinander komplementären Feldeffekttransistoren
EP0248267A3 (de) * 1986-06-06 1990-04-25 Siemens Aktiengesellschaft Monolithisch integrierte Schaltung mit zueinander parallelen Schaltungszweigen
JP2578417B2 (ja) * 1986-12-18 1997-02-05 富士通株式会社 電界効果型トランジスタの製造方法
JPS63305547A (ja) * 1987-06-05 1988-12-13 Fuji Electric Co Ltd 相補型半導体装置
CN114937695B (zh) * 2022-07-25 2022-10-21 北京芯可鉴科技有限公司 双沟道ldmos器件及其制备方法以及芯片

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3356858A (en) * 1963-06-18 1967-12-05 Fairchild Camera Instr Co Low stand-by power complementary field effect circuitry
US3585088A (en) * 1968-10-18 1971-06-15 Ibm Methods of producing single crystals on supporting substrates
US4124807A (en) * 1976-09-14 1978-11-07 Solid State Scientific Inc. Bistable semiconductor flip-flop having a high resistance feedback
JPS5951146B2 (ja) * 1977-02-25 1984-12-12 沖電気工業株式会社 絶縁ゲ−ト型半導体集積回路の製造方法
JPS57145361A (en) * 1981-03-03 1982-09-08 Nec Corp Semiconductor integrated circuit device

Also Published As

Publication number Publication date
DE3279194D1 (en) 1988-12-08
JPS57192081A (en) 1982-11-26
EP0066068A3 (en) 1985-09-18
EP0066068A2 (en) 1982-12-08
EP0066068B1 (en) 1988-11-02

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